AD9508BCPZ

AD9508 is a clock fan-out buffer with output dividers and delay adjust. This device provides clock fan-out capability in a design that emphasizes low jitter to maximize system performance. This device benefits applications like clocking data converters with demanding phase noise and low jitter requirements. The CMOS outputs are 1.8V logic levels, regardless of the operating supply voltage. Each output has a programmable divider that can be bypassed or be set to divide by any integer upto 1024. In addition, the device supports a coarse output phase adjustment between the outputs. The device can also be pin programmed for various fixed configurations at power-up without the need for SPI or I²C programming. It is widely used in application such as low jitter, low phase noise clock distribution, clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs, high performance wireless transceivers, high performance instrumentation, broadband infrastructure etc.

• 1.65GHz differential clock inputs/outputs
• Upto 4 differential outputs or 8 CMOS outputs
• Pin strapping capability for hardwired programming at power-up
• 115fs rms broadband random jitter
• Additive output jitter is 41fs rms typical at (12KHz to 20MHz)
• Excellent output-to-output isolation
• Automatic synchronization of all outputs
• Single 2.5V/3.3V power supply
• Operating temperature is -40°C to +85°C
• Package style is 24-lead lead frame chip scale package [LFCSP]

Notes

ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party