AD9633BCPZ-105

AD9633 is a quad, 12bit, 105MSPS ADC with an on-chip sample-and-hold circuit designed for low cost, low power, small size and ease of use. The ADC requires a single 1.8V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications. The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Typical application includes medical ultrasound, high speed imaging, quadrature and diversity radio receivers and test equipment.

• SNR of 71dB (to Nyquist) and SFDR of 91dBc (to Nyquist)
• DNL of ±0.3LSB (typical) and INL of ±0.5LSB (typical)
• Serial LVDS (ANSI-644, default) and low power, reduced signal option (similar to IEEE 1596.3)
• 650MHz full power analog bandwidth
• 2V p-p input voltage range
• Serial port control (full chip and individual channel power-down modes, flexible bit orientation)
• Built-in and custom digital test pattern generation and multichip sync and clock divider
• Programmable output clock and data alignment, programmable output resolution and standby mode
• 48 lead LFCSP package
• Operating temperature range from -40°C to 85°C

Notes

ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party