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Quantity | Price |
---|---|
1+ | $46.800 |
5+ | $40.540 |
10+ | $34.270 |
Product Information
Product Overview
AD9635 is a dual, 12bit, 80MSPS/125MSPS ADC with an on-chip sample-and-hold circuit designed for low cost, low power, small size and ease of use. The product operates at a conversion rate of up to 125MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical. The ADC requires a single 1.8V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications. Typical application includes communications, diversity radio systems, multimode digital receivers, GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD -SCDMA, I/Q demodulation systems, smart antenna systems, broadband data applications, battery-powered instruments, handheld scope meters, portable medical imaging and ultrasound and radar/LIDAR.
- SNR of 71.8dBFS at fIN = 9.7MHz
- SFDR of 93dBc at 9.7MHz
- DNL of -0.1LSB to +0.2LSB (typical) and INL of ±0.3LSB (typical)
- Serial LVDS (ANSI-644, default) and low power, reduced range option (similar to IEEE 1596.3)
- 650MHz full power analog bandwidth
- 2V p-p input voltage range
- Serial port control (full chip and individual channel power-down modes, flexible bit orientation)
- Built-in and custom digital test pattern generation, standby mode
- programmable output clock and data alignment
- 32 lead LFCSP-EP package, operating temperature range from -40°C to 85°C
Notes
ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party
Technical Specifications
12bit
Differential, Single Ended
Single
1.9V
32Pins
85°C
-
No SVHC (21-Jan-2025)
80MSPS
3 Wire, Serial, SPI
1.7V
LFCSP-EP
-40°C
Dual 12-Bit Pipelined ADCs
MSL 3 - 168 hours
Technical Docs (2)
Legislation and Environmental
RoHS
RoHS
Product Compliance Certificate