KDC5612EVAL

The KDC5612EVAL is a daughter card for the KDC5612P low power, high performance, dual channel 12bit, analogue to digital converters. The KDC5612P is designed with FemtoCharge technology on a standard CMOS process. This IC is supported by the Converter Analyzer version 1.15.6c software which is a graphical user interface (GUI) created with MATLAB. The GUI controls the ADC configuration through the SPI port, reads data from the motherboard and performs post processing and display of the output data. The KDC5612EVAL contain the ADCs and attach directly to the KMB001 mother board to form the ADC evaluation platform. This daughter card routes power from the KMB001 and contains the analogue input circuitry, clock drive and decoupling. The daughter card interfaces to the motherboard through a mezzanine connector. The motherboard contains a USB interface, an FPGA and SRAM and it serves as the interface between the host PC and the ADC daughter card.

• Programmable gain, offset and skew control
• 1.3GHz analogue input bandwidth
• 60fs clock jitter
• Over range Indicator
• Selectable clock divider: divide by 1, divide by 2 or divide by 4
• Clock phase selection
• Nap and sleep modes
• Two’s complement, grey code or binary data format
• DDR LVDS compatible or LVCMOS outputs
• Programmable built in test patterns

Warnings

ESD sensitive device, Take proper precaution while handling the device.