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ManufacturerMICRON
Manufacturer Part NoMT53E2G64D8TN-046 WT:CCopy
Manufacturer Standard Lead Time52 weeks
Newark Part No.25AK7974
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Product Information
ManufacturerMICRON
Manufacturer Part NoMT53E2G64D8TN-046 WT:CCopy
Manufacturer Standard Lead Time52 weeks
Newark Part No.25AK7974
Technical Datasheet
DRAM TypeMobile LPDDR4
DRAM Density128Gbit
Memory Density128Gbit
Memory Configuration2G x 64bit
DRAM Memory Configuration2G x 64bit
Clock Frequency Max2.133GHz
Clock Frequency2.133GHz
IC Case / PackageLFBGA
Memory Case StyleLFBGA
No. of Pins556Pins
Supply Voltage Nom1.1V
IC MountingSurface Mount
Access Time468ps
Operating Temperature Min-25°C
Operating Temperature Max85°C
Product Range-
SVHCNo SVHC (17-Jan-2023)
Product Overview
MT53E2G64D8TN-046 WT:C is a 16Gb mobile low-powerDDR4 SDRAM with low VDDQ. It is a high-speed, CMOS dynamic random-access memory device. This device is internally configured with 2 channels or 1 channel ×16 I/O, each channel having 8-banks. It has selectable output drive strength (DS), clock-stop capability. It has programmable VSS (ODT) termination, single-ended CK and DQS support.
- Operating voltage is 1.10V (VDD2)/0.60V or 1.10V (VDDQ)
- 2Gig x 64 configuration, LPDDR4, 8 die addressing, C design
- Packaging style is 556-ball LFBGA
- Cycle time is 046 = 468ps, ᵗCK RL = 36/40, clock rate is 2133MHz
- Operating temperature range is –25°C to +85°C, data rate per pin is 4266Mb/s
- 16n prefetch DDR architecture, 8 internal banks per channel for concurrent operation
- Single-data-rate CMD/ADR entry, bidirectional/differential data strobe per byte lane
- Programmable READ and WRITE latencies (RL/WL), Upto 8.5 GB/s per die x16 channel
- Programmable and on-the-fly burst lengths (BL = 16,32), partial-array self refresh (PASR)
- Directed per-bank refresh for concurrent bank operation and ease of command scheduling
Technical Specifications
DRAM Type
Mobile LPDDR4
Memory Density
128Gbit
DRAM Memory Configuration
2G x 64bit
Clock Frequency
2.133GHz
Memory Case Style
LFBGA
Supply Voltage Nom
1.1V
Access Time
468ps
Operating Temperature Max
85°C
SVHC
No SVHC (17-Jan-2023)
DRAM Density
128Gbit
Memory Configuration
2G x 64bit
Clock Frequency Max
2.133GHz
IC Case / Package
LFBGA
No. of Pins
556Pins
IC Mounting
Surface Mount
Operating Temperature Min
-25°C
Product Range
-
Technical Docs (1)
Legislation and Environmental
US ECCN:EAR99
EU ECCN:Unknown
RoHS Compliant:Yes
RoHS
RoHS Phthalates Compliant:Yes
RoHS
SVHC:No SVHC (17-Jan-2023)
Download Product Compliance Certificate
Product Compliance Certificate
