74HC74D,653
Flip-Flop, with Set and Reset, Complementary, Positive Edge, 74HC74, D, 14 ns, 82 MHz, 5.2 mA, SOIC
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| Packaging Type | Quantity | Unit Price: | Total |
|---|---|---|---|
| Re-Reel | 1 | $0.371 | $0.37 |
| Total Price | $0.37 | ||
| Quantity | Price |
|---|---|
| 1+ | $0.371 |
| 50+ | $0.222 |
| 100+ | $0.190 |
| 250+ | $0.175 |
| 500+ | $0.164 |
| 1000+ | $0.157 |
| 2500+ | $0.154 |
| 5000+ | $0.151 |
| Quantity | Price |
|---|---|
| 2500+ | $0.193 |
| 5000+ | $0.188 |
Product Information
Product Overview
The 74HC74 is a dual positive edge triggered D-type flip-flop. They have individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition, is stored in the flip-flop and appears at the nQ output. Schmitt-trigger action in the clock input, makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
- Symmetrical output impedance
- Low power dissipation
- High noise immunity
- Balanced propagation delays
- Specified in compliance with JEDEC standard no. 7A
Applications
Clock & Timing, Automation & Process Control, System Monitoring, Embedded Design & Development
Technical Docs (3)
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