SPC5601DF1MLL4

The SPC5601DF1MLL4 is a 32-bit Microcontroller based on e200z0h core compliant with the power architecture embedded category. This device is one of a series of next-generation integrated automotive microcontrollers based on the power architecture technology and designed specifically for embedded applications. The advanced e200z0h host processor core of this automotive controller family complies with the power architecture technology and only implements the VLE (variable-length encoding) APU (auxiliary processing unit), providing improved code density. It operates at speeds of up to 48MHz and offers high performance processing optimized for low power consumption. It capitalizes on the available development infrastructure of current power architecture devices and is supported with software drivers, operating systems and configuration code to assist with the user’s implementations.

• Single issue, 32-bit CPU core complex (e200z0h)
• Interrupt controller (INTC)
• Frequency modulated phase-locked loop (FMPLL)
• Crossbar switch architecture
• Boot assist module (BAM)
• 2 Serial peripheral interface (DSPI) modules
• 3 Serial communication interface (LINFlex) modules
• Enhanced full CAN (FlexCAN) module
• Real time counter (RTC)
• Up to 4 periodic interrupt timers (PIT) with 32-bit counter resolution
• 1 System timer module (STM)
• Nexus development interface (NDI) per IEEE-ISTO 5001-2003 Class 1 standard
• Device/board boundary Scan testing supported
• On-chip voltage regulator (VREG) for regulation of input supply