MC9S12C32CPBE25

The MC9S12C32CPBE25 is a 16-bit Microcontroller based on enhanced HCS12 CPU with CISC architecture operates at a maximum frequency of 25MHz. The device incorporates 32kB internal flash, 2kB internal RAM, 8-channel 10-bit A/D converter and 35 general-purpose I/O pins. This device also features peripherals like one multi-scalable controller area networks (MSCAN) CAN 2.0 A/B software compatible module, one serial communications interface (SCI) and one serial peripheral interface modules (SPI).

• Memory map and interface (MMC)
• Interrupt control (INT)
• Background debug mode (BDM)
• Enhanced debug module including breakpoints and change-of-flow trace buffer (DBG12)
• Upward compatible with M68HC11 instruction set
• Interrupt stacking and programmer’s model identical to M68HC11
• Instruction queue
• Enhanced indexed addressing
• Wake-up Interrupt Inputs
• Timer module (TIM) - 16-bit counter with 7-bit Prescaler
• 6 PWM channels
• Clock reset generator module (CRG)
• Windowed COP watchdog
• Real time interrupt
• Clock monitor
• Clock generation
• Reset generation
• Phase-locked loop clock frequency multiplier
• Limp home mode in absence of external clock
• Low power 0.5 to 16MHz Crystal oscillator reference clock
• 32MHz Equivalent to 16MHz bus speed for single chip and in expanded bus modes
• 50MHz Equivalent to 25MHz bus speed option
• Single-wire background debug™ mode (BDM)
• On-chip hardware breakpoints
• Enhanced DBG12 debug