MT29F64G08AFAAAWP-ITZ:A

MT29F64G08AFAAAWP-ITZ:A is a NAND flash memory device that includes an asynchronous data interface for high-performance I/O operations. This device uses a highly multiplexed 8-bit bus (DQx) to transfer commands, addresses, and data. There are five control signals used to implement the asynchronous data interface: CE#, CLE, ALE, WE#, and RE#. Additional signals control hardware write protection (WP#) and monitor device status (R/B#). This NAND flash device additionally includes a synchronous data interface for high-performance I/O operations. When the synchronous interface is active, WE# becomes CLK and RE# becomes W/R#. Data transfers include a bidirectional data strobe (DQS). This hardware interface creates a low pin-count device with a standard pinout that remains the same from one density to another, enabling future upgrades to higher densities with no board redesign. A target is the unit of memory accessed by a chip-enabled signal. A target contains one or more NAND flash die.

• 64Gb density, 8bits device width, 1-bit bit-cell, 2 die, 2 number of CE and R/B, common I/O
• Operating voltage range from VCC: 3.3V (2.7–3.6V), VCCQ: 3.3V (2.7–3.6V)
• First set of device features, Async only interface, polyimide process applied, 200MT/s speed grade
• Open NAND Flash Interface (ONFI) 2.2-compliant, single-level cell (SLC) technology
• Page size x8: 8640 bytes (8192 + 448 bytes), block size: 128 pages (1024K + 56K bytes
• Plane size: 2 planes x 2048 blocks per plane
• Up to synchronous timing mode 5, clock rate: 10ns (DDR), read/write throughput per pin: 200MT/s
• Up to asynchronous timing mode 5, tRC/tWC: 20ns (MIN), read/write throughput per pin: 50MT/s
• Read page: 35µs (MAX), program page: 350µs (TYP), erase block: 1.5ms (TYP)
• 48-pin TSOP package, industrial operating temperature range from -40°C to +85°C