LPC1227FBD48/301,1

The LPC1227FBD48/301 is a 32-bit Microcontroller based on ARM Cortex-M0 core with RISC architecture operates at a maximum frequency of 30MHz. Benefitting from the ARM Cortex-M0 thumb instruction set have up to 50% higher code density compared to common 16-bit microcontroller performing typical tasks. The LPC122x also feature an optimized ROM-based divide library for Cortex-M0, which offers several times the arithmetic performance of software-based libraries, as well as highly deterministic cycle time combined with reduced flash code size. The device incorporates 128kB internal flash, 8kB internal RAM, 8-channel 10-bit A/D converter with sample rates of up to 400ksps, four general purpose counters/timers and 39 general-purpose I/O pins. This device also features peripherals like two USARTs, one inter-integrated circuit (I2C) and one serial peripheral interface (SPI) module.

• ARM Cortex-M0 built-in nested vectored interrupt controller (NVIC)
• Serial wire debug (SWD)
• System tick timer
• In-system programming (ISP) and In-application programming (IAP)
• Includes ROM-based 32-bit integer division routines
• Crystal oscillator with an operating range of 1MHz to 25MHz
• 12MHz Internal RC (IRC) oscillator trimmed to 1 % accuracy
• PLL allows CPU operation up to the maximum CPU rate
• Real-time clock (RTC)
• Micro DMA controller with 21 channels
• CRC Engine
• SSP/SPI Controller with FIFO and multi-protocol capabilities
• All GPIO pins can be used as edge and level sensitive interrupt sources
• Windowed watchdog timer (WWDT) IEC-60335 class B certified
• Two highly flexible analog comparators
• Three reduced power modes - sleep, deep-sleep and deep power-down
• Processor wake-up from deep-sleep mode via start logic using 12 port pins
• Processor wake-up from Deep-power down and Deep-sleep modes via the RTC
• Brownout detect with three separate thresholds each for interrupt and forced reset
• Power-on reset (POR)