MC56F8367VPYE

The MC56F8367VPYE is a Digital Signal Controller belong to the 56800E core-based DSC family. It combines digital signal processing and microcontroller functionalities on a single chip, with a flexible set of peripherals. The 56800E core is based on a Harvard-style architecture consisting of three execution units operating in parallel, allowing as many as six operations per instruction cycle. The MCU-style programming model and optimized instruction set allow straightforward generation of efficient, compact DSP and control code. The instruction set is also highly efficient for C/C++ compilers to enable rapid development of optimized control applications. It supports program execution from internal or external memories. Two data operands can be accessed from the on-chip data RAM per instruction cycle. This device also provide two external dedicated interrupt lines and up to 76 general purpose input/output (GPIO) lines, depending on peripheral configuration.

• Access up to 4MB of OFF-chip program and 32MB of data memory
• Up to 60 MIPS at 60MHz execution frequency
• Chip select logic for glueless interface to ROM and SRAM
• JTAG/EOnCE for unobtrusive real-time debugging
• Up to two FlexCAN (CAN Version 2.0 B-compliant)
• Two serial communication interfaces (SCIs)
• Up to two serial peripheral interfaces (SPIs)
• Two dedicated external interrupt pins
• Software-programmable phase-lock loop