DF3052BF25V

DF3052BF25V is a H8/3052B 16bit microcontroller with embedded 512Kb flash microcomputer. It integrates system supporting functions together with an H8/300H CPU core having an original Renesas technology architecture. The H8/300H CPU has a 32-bit internal architecture with sixteen 16-bit general registers, and a concise, optimized instruction set designed for speed. It can address a 16-Mbyte linear address space. Its instruction set is upward-compatible at the object-code level with the H8/300 CPU, enabling easy porting of software from the H8/300 series. The on-chip system supporting functions include ROM, RAM, a 16-bit integrated timer unit (ITU), a programmable timing pattern controller (TPC), a watchdog timer (WDT), a serial communication interface (SCI), an A/D converter, a D/A converter, I/O ports, a direct memory access controller (DMAC), a refresh controller, and other facilities.

• Flash memory: 512kbytes, RAM: 8kbytes
• Seven external interrupt pins: NMI, IRQ0 to IRQ5, 30 internal interrupts controllers
• DRAM refresh, pseudo-static RAM refresh
• Programmable timing pattern controller (TPC), 16-bit integrated timer unit (ITU)
• Watchdog timer (WDT), 1 channel, bus controller
• Serial communication interface (SCI), 2 channels
• A/D converter, D/A converter, I/O ports
• Sleep mode, software standby mode, hardware standby mode
• On-chip clock pulse generator, upward-compatible with the H8/300 CPU at the object-code level
• Operating temperature range from -40 to +85°C